UFS 4.0 Protocol Analyzer
Product
Overview
Datasheet
Presentation
Application
Notes
PGY-UFS4.0-PA, UFS Protocol Analyzer is the industry-first working and tested UFS4.0 Protocol Analyzer. It offers protocol data capture and debugging of data across MPHY, UniPro, and UFS protocol layers. It allows for instantaneous decoding of UFS, UniPro, and MPHY layers with the flexibility to correlate decoded data across these protocol layers. PGY-UFS4.0-PA supports PWMG1 to HSG5B data rates and two TX, and two RX lane decode. The active probe has minimum electrical loading on the device under test (DUT) and captures protocol data without affecting the performance of DUT. PGY-UFS4.0- PA Protocol Analyzer supports two-lane data. Comprehensive on the fly decoding of UniPro & UFS data enables validation of communication between UFS host and device.
PGY-UFS4.0-PA Protocol Analyzer allows Design and Test Engineers to obtain deep insight into UFS host and device communication. MPHY/UniPRO/UFS packet-based triggering allows specific protocol data capture and analysis. PGY-UFS Protocol analyzer instantaneously provides decoding of UFS, UniPro, and MPHY layers with a correlation to MPHY, UniPro, and UFS layers.
PGY-SPMI-EX-PD SPMI Protocol Exerciser and Analyzer
Key features
- Supports SPMI v 1.0/ 2.0 specifications
- Ability to configure it as Master or Slave
- Supports Sole Master feature
- Supports Request Capable Slave (RCS) feature
- Supports the complex BUS arbitration process
- Generate different SPMI Packets
- Error injection such as parity error, ACK/NACK error, and Skip SSC error
- Variable SPMI data speeds (32kHz – 26Mhz1), Voltage drive levels (1.2 or 1.8), and Duty Cycle (25%,50%, and 75%).
- Simultaneously generate SPMI traffic and Protocol decode of the Bus
- Continuous streaming of protocol data to HDD/SSD
- A timing diagram of Protocol decoded bus
- Listing view of Protocol activity
- Error Analysis in Protocol decoded data
- Ability to write exerciser script to combine multiple
- data frame generation at different data speeds
- USB2/3 host computer interface
- API support for automation in Python and C++
- Flexibility to upgrade to the unit for evolving SPMI Specification
- Optional Protocol Implementation Compliance Statement (PICS) supports scripts
SPMI Protocol Analyzer(PGY-SPMI-EX-PD) is the Protocol Analyzer with multiple features to capture and debug communication between host and design under test. SPMI (System Power Management Interface) is a MIPI (Mobile Industry Processor Interface) standard with a 2-wire synchronous serial, a bidirectional interface that connects the integrated Power Controller(PC) of a System-on-Chip (SoC) processor system with one or more Power Management Integrated Circuits (PMIC) voltage regulation systems.
PGY-SPMI-EX-PD is the leading instrument that enables the design and test engineers to test the SPMI designs for its specifications by configuring PGY-SPMI-EX-ED as master/slave, generating SPMI traffic with time variation and error injection capability and decoding SPMI Protocol packets.
Comprehensive Protocol Analysis using Multi-View
Multidomain View provides the complete view of SPMI Protocol activity in a single GUI. Users can easily set up the analyzer to generate SPMI traffic using a GUI or script. Users can set different trigger conditions from the setup menu to capture Protocol activity at a specific event and decode the transition between Master and Slave. The decoded results can be viewed in the timing diagram and Protocol listing window with autocorrelation. This comprehensive view of information makes it the industry’s best, offering an easy-to-use solution to debug the SPMI protocol activity. Continuous streaming protocol activity to host system HDD/SSD ensures seamless roll mode operation without the need to recapture data when DUT/s are set to different states thereby saving test times.
Exerciser
PGY-SPMI-EX-PD supports SPMI traffic generation using GUI and Script. Users can generate simple traffic generation using the GUI to test the DUT. Script-based GUI provides flexibility to emulate the complete expected traffic in the real world including error injections. In this sample, the script user can generate SPMI traffic as below.
Script line #1: Reg Write to the slave with USID 05
Script line #2: Reg Read to the slave with USID 05
Script line #3: Ext Reg Write to the slave with USID 05
Script line #4: Ext Reg Read to the slave with USID 05
Timing Diagram and Protocol Listing View
PGY-UFS3.X-PA Software does the live decode and lists all the events. The list of events is shown in this picture. Users can easily note the errors in captured protocol data. In large buffer capture, it takes extremely difficult to locate the errors. But PPGGY-UFS3.X-PA software simplifies this by listing events while decoding the captured data. Search and Fliter allows you directly locate the error events or UFS or UniPro or PACP packet in the protocol listing windows. Filter-in and Filter-out make it easy to view the data of interest in the protocol listing window
Multidomain View provides the complete view of SPMI Protocol activity in a single GUI. Users can easily set up the analyzer to generate SPMI traffic using a GUI or script. Users can set different trigger conditions from the setup menu to capture Protocol activity at a specific event and decode the transition between Master and Slave. The decoded results can be viewed in the timing diagram and Protocol listing window with autocorrelation. This comprehensive view of information makes it the industry’s best, offering an easy-to-use solution to debug the SPMI protocol activity. Continuous streaming protocol activity to host system HDD/SSD ensures seamless roll mode operation without the need to recapture data when DUT/s are set to different states thereby saving test times.
The protocol window provides the decoded packet information in each state and all packet details. The selected frame in the Protocol listing window will be autocorrelated in the timing view to view the timing information of the packet.
Powerful Trigger Capabilities
The protocol window provides the decoded packet information in each state and all packet details. The selected frame in the Protocol listing window will be autocorrelated in the timing view to view the timing information of the packet.
Key Specifications
Specifications
Ordering Information
PGY-SPMI-EX-PD (v 2.0): SPMI Protocol Exerciser and Analyzer (v 2.0 Specifications)
PGY-SPMI-UPG (v 1.0 to v 2.0): SPMI Protocol Exerciser and Analyser upgrade from v 1.0 Specifications to v 2.0 Specifications.
-Opt PICS (Protocol Implementation Compliance Statement test scripts v 1.0 for 2.0 SPMI
specifications)
Deliverables for PGY-SPMI-EX-PD
PGY-SPMI-EX-PD Unit
USB3.0 cable
PGY-SPMI-EX-PD Software in CD
12V DC adopter
Flying lead probe cable with female connector to connect to DUT
Dimension: ( L- 157mm ; W- 90mm ; H-27mm )
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