Sideband Signal Analysis for PCIe Interfaces Using PGY-PCIeLP-SBA
Silicon vendors need to validate the electrical timing measurements of side band signals at different state of the DUT and see the consistency over long period of time.
To address this requirement Prodigy Technovations has developed PGY-PCIeLP-SBA PCIe Side Band Signal Analyzer. Which monitors these signals and gives the statistical information of the measurements over multicycle operation to ensure stable and reliable operation. The PGY-PCIeLP-SBA includes discovery series logic analyzer (palmtop size) with customized logic for PCIe Side Band signal analysis with REFCLK, Software to view the results and debug capabilities, flying lead probes with M.2 extender board with access to side band signals.
PGY-PCIeLP-SBA monitors CLKREQ, REFCLK, PERSET and PWR signals of the M.2 interface during the different operating conditions. It provides timing measurement of these signals as per PCIe and M.2 interface specification documents. User can also set hardware-based trigger on specific timing measurement failure and get notified. API supports the user test the DUT over a long period of time. User interface displays timing diagram with abstract view of the 100MHz REFCLK condition the low power state, restart and power recycle and power on state of the during while running the test case.
The typical test setup for PCIe Side band Signal analysis is:
PGY-PCIeLP-SBA has M.2 extender board with access to all side band signals which can be connected to PCIe Low Power Side Band Signal Analyzer. The software runs in windows PC enables the configuration of Analyzer for measurements and trigger conditions. It continuously plots the timing waveforms and updates timing measurements summary statistical and detail information
Software will automatically detect the power on test, low power entry and exit test, restart test and sudden power shutdown test. It will make applicable measurements all these test cases and reports the results in listing form. It will also provide statistical information of the timing measurements and continuous plot of timing diagram of the side band signals.
User can correlate any specific timing measurements in the measurements detail listing view to the timing waveform plot to locate this event.
User can sort the pass or fail results in the listing view. If any specific timing measurement needs to corelated to the timing waveform which has entire data of all test cases, user clicking the timing measurements locate this in timing waveform.
For efficient method to capture the elusive events PGY-PCIeLP-SBA provides trigger on timing measurement failure. The pre and post trigger data enables the user to view the data prior to trigger event and post trigger event to identify the probable cause to the timing failure. The trigger and corelating the timing measurement to timing diagrams make it a efficient debugging tool.
PGY-PCIeLP-SBA PCIe Sideband Signal Analyzer is the industry first portable instrument with software which can analyzer the sideband signals during different state of the PCIe interface. The Discovery logic analyzer which is included in PGY-PCIeLP-SBA also support trigger and protocol decode of I3C and I2C (SM Bus) interfaces. This makes it most complete low cost easy to use instrument for any design, pre and post silicon test and field engineers to validate and debug the side band signals.
Want to learn more? Join our webinar on “Overview of PCIe Sideband Signal Functionality at Power-On & Low Power State, and Validation.”
👉 Register here: https://www.prodigytechno.com/overview-of-pcie-side-band-signals-functionalities-at-power-on-low-power-state-and-validation
Prodigy Technovations offers a PCIe Low Power Side Band Signal Analyzer to help you capture and analyze critical signal behavior during power transitions.
Learn more: https://www.prodigytechno.com/device/pcie-low-power-side-band-signal-analyzer
