UFS 4.0 Protocol Analyzer





PGY-UFS4.0-PA, UFS Protocol Analyzer is the industry-first working and tested UFS4.0 Protocol Analyzer. It offers protocol data capture and debugging of data across MPHY, UniPro, and UFS protocol layers. It allows for instantaneous decoding of UFS, UniPro, and MPHY layers with the flexibility to correlate decoded data across these protocol layers. PGY-UFS4.0-PA supports PWMG1 to HSG5B data rates and two TX, and two RX lane decode. The active probe has minimum electrical loading on the device under test (DUT) and captures protocol data without affecting the performance of DUT. PGY-UFS4.0- PA Protocol Analyzer supports two-lane data. Comprehensive on the fly decoding of UniPro & UFS data enables validation of communication between UFS host and device.

PGY-UFS4.0-PA Protocol Analyzer allows Design and Test Engineers to obtain deep insight into UFS host and device communication. MPHY/UniPRO/UFS packet-based triggering allows specific protocol data capture and analysis. PGY-UFS Protocol analyzer instantaneously provides decoding of UFS, UniPro, and MPHY layers with a correlation to MPHY, UniPro, and UFS layers.

STEPg1 Electrical Validation and Protocol Decode Software Datasheet

Key features

  • Protocol Decoding of the acquired waveform into BTU’s (Basic Transport Unit)
  • Software Automatically identifies the different symbols, delimiters and idle and makes the electrical measurements.
  •  Color marking of the control and data symbols of the BTU.
  • Jitter measurements of repetitive symbols (Prerequisite: DPOJET Software tool is required).
  • Electrical measurements are made for the entire acquired waveform and hence increases the reliability of the measurements.
  • Automation of Software using python scripting is supported.
  • User defined limit setup for electrical measurements.
  • Automatically saves the waveform images for minimum and maximum measurement values of each electrical parameter to the report.
  • Export of results to CSV and txt files
  • Report generation is supported for documentation.

STEPg1 is a 12Gbps high speed serial link in Intel’s 16th generation core and future products. STEPg1, an Intel patented technology, utilizes Pulse Width Modulation of the positive and negative pulses for transmission of serial data and thus results in an increased number of bits per cycle. STEPg1 is a time domain encoded protocol which works with a reduced supply voltage. Prodigy Technovations has developed fully automated electrical measurement software to validate the electrical and protocol layer specification of STEPg1 interface.

STEPg1 Electrical Validation and Protocol Decode Software

PGY-STEPg1 electrical and protocol decode software seamlessly integrates with Tektronix DPO7000DX/SX series oscilloscope and provides all the necessary electrical measurements and protocol decoded data at touch of a button.

PGY-STEPg1 software automatically identifies the Symbol0, Symbol1, symbol2, Symbol3, Symbol6 in the acquired waveforms and makes the applicable measurements and decodes the waveform.

List of Electrical Measurements for each Symbol

Detail View

Protocol decode view with overlaying of the protocol information along with waveform display. Detail view plot with protocol decode listing of BTU’s provides the flexibility to correlate the decoded BTU data with waveform for easy debugging of any errors. Software decodes and lists all BTU’s and idles along with their timestamp. User can select each BTU to check the data content along with all the symbols with their polarity.

Electrical Measurements Results

Electrical measurements for each of the symbols identified in the acquired waveform are done separately and the parameters are listed along with their minimum and maximum values determined. The measured results are compared with user defined limits to decide on the pass/fail criteria.

Key Specifications

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