I3C Test Solutions

Verify I3C controller IP and system behavior during design and FPGA bring-up. Simulate sensors to accelerate integration and test protocol features before tape-out.

The 13C USB Adapter is designed for high-volume production environments
where reliability, repeatability, and speed are critical. With fixed voltage
levels, stable 13C signaling, and seamless integration into automated test
setups, it enables consistent functional testing across large batches of
devices. Its simple interface and robust performance make it ideal for end-
of-line validation and manufacturing QA processes.

Platform Level data Model (PLDM) over MCTP is emerging application for 13C protocol. PLDM application layer protocol is used for communication between components in server. PLDM carries out monitoring hardware, updating firmware, monitoring power states.

PGY-13C-EX-PD supports PLDM protocol scripting analysis for easy testing of PLDM supported devices. user can generate PDM traffic by easy to auto guided script and inject to the device under test (DUT). The tester analyzes this traffic and display response from the DUT and list the communication between tester and DI-JT.

The NVMe management Interface (NVMe-Ml) commands encapsulated in MCTP protocol enables the management of solid-state drives (SSDs), enclosures independent of the operating system. NVMe-Ml protocol used in out of band mode allows separate management controller (BMC) to communicate with SSDS and other peripherals using dedicated 13C interface. This ensures continuous management of system though the high-speed links are not operation due any issues.

PGY-13C-EX-PD supports NVMe-Ml Protocol scripting over MCTP transport layer protocol and drive the NVMe-Ml traffic to DUT. The tester also decodes the NVMe-Ml traffic in a System with 13C has a independent interface.

University New Hampshire (UNH) IOLS developed conformance test Suite cases so that NVMe-Ml Protocol works reliably in configuration, health status polling, and data length verifications. PGY-13C-EX-PD drives all these test cases traffic to DUT at a press of a button. The software ware analyses the DUT response for conformance to tests and report pass/fail status for each test case. It also provides detail report for test case failure easy debugging of the failed test cases.

Our 16-channel Logic Analyzer provides protocol-aware triggering and precise digital signal capture for 13C system debugging. It offers accurate timing analysis, supports multi-signal correlation, and helps engineers validate controller—device interactions, identify protocol violations, and troubleshoot complex 13C behaviors during system bring-up and post-silicon validation.

SoC and device IC development goes through multiple stages before being tape-out of the IC. Due to design complexity and the need for first-time success, semiconductor vendors increasingly rely on extensive pre-silicon validation using FPGA-based prototype or emulator boards.

Common workflow: a. Interface the UFS device to FPGA Platform where SoC or UFS IP with MPHY test chip is present and run different test cases b. Interface the real-world SoC with UFS host support

Management Component Transport Protocol (MCTP) a transport layer protocol and encapsulated in 13C Protocol. MCTP enables intercommunication among different devices in management controller, GPUs, CPUs and intelligent devices.

PGY-13C-EX-PD enables designer and test engineer write the MCTP layer protocol script to generate MCTP over 13C traffic to validate the DUT performance. Also, Tester will decode the MCTP communication in a 13C bus.